Added the adr instruction
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@ -32,11 +32,16 @@ include::instructions-operands-encoding.adoc[]
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|SVC
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|SVC
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|<<SVCINSTR>>
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|<<SVCINSTR>>
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|ADR
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|<<ADRINSTR>>
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|===
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|===
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<<<
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<<<
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include::instructions/nop.adoc[]
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include::instructions/nop.adoc[]
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<<<
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<<<
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include::instructions/svc.adoc[]
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include::instructions/svc.adoc[]
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<<<
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include::instructions/adr.adoc[]
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<<<
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<<<
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==== Memory-Related Instructions
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==== Memory-Related Instructions
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45
src/execution-engine-spec/instructions/adr.adoc
Normal file
45
src/execution-engine-spec/instructions/adr.adoc
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@ -0,0 +1,45 @@
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[id=ADRINSTR]
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===== ADR : Address from PC-relative offset
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[wavedrom, ,svg]
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....
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{reg: [
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{bits: 7, name: 0x1d, type: 8, attr: '0x1d'},
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{bits: 4, name: 'off[3:0]', type: 5},
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{bits: 5, name: 'dst', type: 2},
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{bits: 16, name: 'off[19:4]', type: 5}
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], config: {label: {right: 'ADRI'}}}
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....
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Description::
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Constructs an absolute address from a given *pc*-relative offset and stores it in a given register.
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Sets the `dst` register to the value of `pc + off`.
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Encoding:: C-Type
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Assembler syntax::
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+
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[source]
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----
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adr <dst>, <off>
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----
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+
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Where:
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[horizontal]
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dst::: Destination register.
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off:::
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Immediate offset.
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Must be in the range -524288..524287.
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Examples::
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+
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[source]
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----
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adr r0, -48 <1>
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adr r1, 0x1234 <2>
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----
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<1> Sets r0 to `pc - 48`.
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<2> Sets r1 to `pc + 0x1234`.
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Privileged instruction:: No.
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Updates program state flags:: No.
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Exceptions::
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None.
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