From 48bdcb9f662ae3192051c963f716572cc947c6d7 Mon Sep 17 00:00:00 2001 From: Elyan Date: Mon, 11 Nov 2024 16:57:14 +0100 Subject: [PATCH] Added the adr instruction --- src/execution-engine-spec/instructions.adoc | 5 +++ .../instructions/adr.adoc | 45 +++++++++++++++++++ 2 files changed, 50 insertions(+) create mode 100644 src/execution-engine-spec/instructions/adr.adoc diff --git a/src/execution-engine-spec/instructions.adoc b/src/execution-engine-spec/instructions.adoc index 12d4983..42806b7 100644 --- a/src/execution-engine-spec/instructions.adoc +++ b/src/execution-engine-spec/instructions.adoc @@ -32,11 +32,16 @@ include::instructions-operands-encoding.adoc[] |SVC |<> + +|ADR +|<> |=== <<< include::instructions/nop.adoc[] <<< include::instructions/svc.adoc[] +<<< +include::instructions/adr.adoc[] <<< ==== Memory-Related Instructions diff --git a/src/execution-engine-spec/instructions/adr.adoc b/src/execution-engine-spec/instructions/adr.adoc new file mode 100644 index 0000000..fee6eb0 --- /dev/null +++ b/src/execution-engine-spec/instructions/adr.adoc @@ -0,0 +1,45 @@ +[id=ADRINSTR] +===== ADR : Address from PC-relative offset +[wavedrom, ,svg] +.... +{reg: [ + {bits: 7, name: 0x1d, type: 8, attr: '0x1d'}, + {bits: 4, name: 'off[3:0]', type: 5}, + {bits: 5, name: 'dst', type: 2}, + {bits: 16, name: 'off[19:4]', type: 5} +], config: {label: {right: 'ADRI'}}} +.... + +Description:: + Constructs an absolute address from a given *pc*-relative offset and stores it in a given register. + Sets the `dst` register to the value of `pc + off`. +Encoding:: C-Type +Assembler syntax:: ++ +[source] +---- +adr , +---- ++ +Where: +[horizontal] +dst::: Destination register. +off::: + Immediate offset. + Must be in the range -524288..524287. + +Examples:: ++ +[source] +---- +adr r0, -48 <1> +adr r1, 0x1234 <2> +---- +<1> Sets r0 to `pc - 48`. +<2> Sets r1 to `pc + 0x1234`. + +Privileged instruction:: No. +Updates program state flags:: No. +Exceptions:: + None. +