Added info on the data handled by the CPU
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= Central(Execution Engine): Public Interface Specification
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:reproducible:
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:doctype: book
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:lang: en
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:toc: left
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:toclevels: 5
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include::global-config.adoc[]
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include::custom-attributes.adoc[]
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:preface-title: Preface
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include::glossary.adoc[]
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This document presents the public interface of an _Execution Engine_ of the {central-arch-name}.
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This means that the amount of information pertaining to the internals of an _Execution Engine_ hardware implementation are kept at a minimum except when a choice in the public interface is specifically made to simplify said implementation.
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include::execution-engine-spec/glossary.adoc[]
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include::execution-engine-spec/data-manipulation.adoc[]
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:central-arch-name: pass:quotes[**Central(**Architecture**)**]
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src/execution-engine-spec/data-manipulation.adoc
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== Data Manipulation
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=== Data width
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All the registers of the {central-arch-name} are 32bit wide.
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=== Address width
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Memory addresses are 24bit wide thus an _Execution Engine_ can address up to 16MB of memory.
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=== Memory alignment
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The {central-arch-name} uses byte-addressable memory. Under the hood, memory accesses are done on a memory-word boundary.
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A memory-word is 32bit wide. To maximize performance, memory accesses should be done on a 32bit alignment.
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NOTE: The term "`memory accesses`" encompasses both read and write operations.
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=== Endianness
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Data is encoded in memory with the little endian scheme. For a given value, the least significant byte (LSB) is stored in the lowest address and the most significant byte (MSB) in the highest.
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src/execution-engine-spec/glossary.adoc
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[glossary]
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== Glossary
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[glossary]
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Central Processing Unit:: An hardware unit containing one or more _Execution Engines_, a memory controller, an interrupt controller, an operator facility controller and various other minor components.
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Execution Engine:: The hardware responsible for the execution of user-written code, be it kernel code or user program code. An _Execution Engine_ contains a fetch unit, a decode unit, a micro-instruction sequencer, an Arithmetic & Logic Unit, various registers and subsystems. An _Execution Engine_ is analogous to an _hart_ in the RISC-V nomenclature or to a _core_ in other CPU specifications.
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:reproducible:
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:doctype: book
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:icons: font
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:lang: en
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:toc: left
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:toclevels: 5
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[glossary]
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== Glossary
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[glossary]
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Central Processing Unit:: An hardware unit containing one or more *Execution Engines*, a memory controller, an interrupt controller, an operator facility controller and various other minor components.
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Execution Engine:: The hardware responsible for the execution of user-written code, be it kernel code or user program code. An *Execution Engine* contains a fetch unit, a decode unit, a micro-instruction sequencer, an Arithmetic & Logic Unit, various registers and subsystems. An *Execution Engine* is analogous to an *hart* in the RISC-V nomenclature or to a *core* in other CPU specifications.
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