diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..567609b --- /dev/null +++ b/.gitignore @@ -0,0 +1 @@ +build/ diff --git a/src/central-execution-engine-spec.adoc b/src/central-execution-engine-spec.adoc index a01c890..f6768e9 100644 --- a/src/central-execution-engine-spec.adoc +++ b/src/central-execution-engine-spec.adoc @@ -1,8 +1,11 @@ = Central(Execution Engine): Public Interface Specification -:reproducible: -:doctype: book -:lang: en -:toc: left -:toclevels: 5 +include::global-config.adoc[] +include::custom-attributes.adoc[] +:preface-title: Preface -include::glossary.adoc[] +This document presents the public interface of an _Execution Engine_ of the {central-arch-name}. +This means that the amount of information pertaining to the internals of an _Execution Engine_ hardware implementation are kept at a minimum except when a choice in the public interface is specifically made to simplify said implementation. + +include::execution-engine-spec/glossary.adoc[] + +include::execution-engine-spec/data-manipulation.adoc[] \ No newline at end of file diff --git a/src/custom-attributes.adoc b/src/custom-attributes.adoc new file mode 100644 index 0000000..850ab12 --- /dev/null +++ b/src/custom-attributes.adoc @@ -0,0 +1 @@ +:central-arch-name: pass:quotes[**Central(**Architecture**)**] \ No newline at end of file diff --git a/src/execution-engine-spec/data-manipulation.adoc b/src/execution-engine-spec/data-manipulation.adoc new file mode 100644 index 0000000..297c4e3 --- /dev/null +++ b/src/execution-engine-spec/data-manipulation.adoc @@ -0,0 +1,15 @@ +== Data Manipulation +=== Data width +All the registers of the {central-arch-name} are 32bit wide. + +=== Address width +Memory addresses are 24bit wide thus an _Execution Engine_ can address up to 16MB of memory. + +=== Memory alignment +The {central-arch-name} uses byte-addressable memory. Under the hood, memory accesses are done on a memory-word boundary. +A memory-word is 32bit wide. To maximize performance, memory accesses should be done on a 32bit alignment. + +NOTE: The term "`memory accesses`" encompasses both read and write operations. + +=== Endianness +Data is encoded in memory with the little endian scheme. For a given value, the least significant byte (LSB) is stored in the lowest address and the most significant byte (MSB) in the highest. \ No newline at end of file diff --git a/src/execution-engine-spec/glossary.adoc b/src/execution-engine-spec/glossary.adoc new file mode 100644 index 0000000..456eeb3 --- /dev/null +++ b/src/execution-engine-spec/glossary.adoc @@ -0,0 +1,6 @@ +[glossary] +== Glossary + +[glossary] +Central Processing Unit:: An hardware unit containing one or more _Execution Engines_, a memory controller, an interrupt controller, an operator facility controller and various other minor components. +Execution Engine:: The hardware responsible for the execution of user-written code, be it kernel code or user program code. An _Execution Engine_ contains a fetch unit, a decode unit, a micro-instruction sequencer, an Arithmetic & Logic Unit, various registers and subsystems. An _Execution Engine_ is analogous to an _hart_ in the RISC-V nomenclature or to a _core_ in other CPU specifications. \ No newline at end of file diff --git a/src/global-config.adoc b/src/global-config.adoc new file mode 100644 index 0000000..0a26fb9 --- /dev/null +++ b/src/global-config.adoc @@ -0,0 +1,6 @@ +:reproducible: +:doctype: book +:icons: font +:lang: en +:toc: left +:toclevels: 5 \ No newline at end of file diff --git a/src/glossary.adoc b/src/glossary.adoc deleted file mode 100644 index 934ec74..0000000 --- a/src/glossary.adoc +++ /dev/null @@ -1,7 +0,0 @@ -[glossary] -== Glossary - -[glossary] -Central Processing Unit:: An hardware unit containing one or more *Execution Engines*, a memory controller, an interrupt controller, an operator facility controller and various other minor components. - -Execution Engine:: The hardware responsible for the execution of user-written code, be it kernel code or user program code. An *Execution Engine* contains a fetch unit, a decode unit, a micro-instruction sequencer, an Arithmetic & Logic Unit, various registers and subsystems. An *Execution Engine* is analogous to an *hart* in the RISC-V nomenclature or to a *core* in other CPU specifications.