central-arch/cmd/cpusim/cpusim.go

25 lines
624 B
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2024-10-09 20:31:30 +00:00
package main
import (
"github.com/rivo/tview"
)
func main() {
asm := tview.NewBox().SetBorder(true).SetTitle("Assembly")
regs := tview.NewBox().SetBorder(true).SetTitle("Registers")
ram := tview.NewBox().SetBorder(true).SetTitle("Memory")
rootPanel := tview.NewFlex().SetDirection(tview.FlexColumn)
rightPanel := tview.NewFlex().SetDirection(tview.FlexRow)
rootPanel.AddItem(asm, 55, 1, true)
rootPanel.AddItem(rightPanel, 0, 1, false)
rightPanel.AddItem(regs, 8, 1, false)
rightPanel.AddItem(ram, 0, 1, false)
if err := tview.NewApplication().SetRoot(rootPanel, true).Run(); err != nil {
panic(err)
}
}