Memory access #8

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opened 2024-10-13 21:59:54 +00:00 by elyan · 0 comments
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  • Aligned/unaligned reading and writing
  • Cache
  • Hardware page table walker
  • TLB
- [ ] Aligned/unaligned reading and writing - [ ] Cache - [ ] Hardware page table walker - [ ] TLB
elyan added this to the Execution Engine - Hardware Internals Spec project 2024-10-13 21:59:54 +00:00
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Reference: elyan/central-arch-doc#8
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