diff --git a/src/execution-engine-spec/glossary.adoc b/src/execution-engine-spec/glossary.adoc
index 5785630..3061b42 100644
--- a/src/execution-engine-spec/glossary.adoc
+++ b/src/execution-engine-spec/glossary.adoc
@@ -4,7 +4,7 @@
 [glossary]
 [horizontal]
 Processing Complex::
-    Composed of a _Processing Unit_, memory modules and subsystems that are not located inside of the _Processing Unit_ (e.g. Channel I/O Subsytem, Hardware Management Subsystem).
+    Composed of a _Processing Unit_, memory modules and subsystems that are not located inside of the _Processing Unit_ (e.g. Channel I/O Subsystem, Hardware Management Subsystem).
     The name applies both to the hardware enclosure and the hardware inside said enclosure.
 
 Processing Unit::
diff --git a/src/execution-engine-spec/instructions.adoc b/src/execution-engine-spec/instructions.adoc
index fa1e1f7..dba7b5f 100644
--- a/src/execution-engine-spec/instructions.adoc
+++ b/src/execution-engine-spec/instructions.adoc
@@ -7,7 +7,7 @@ For instruction encoding formats that contain an immediate value, not all immedi
 
 include::images/instruction-formats.adoc[]
 
-.Bit ranges legend
+.Bits ranges legend
 opcode::
     The operation to carry on.
 rd::
@@ -30,3 +30,12 @@ cmd::
 === Instruction list
 #TODO: List instructions#
 
+* memory load/store instructions
+* register move instructions
+* arithmetic instructions
+* bitwise operations instructions (w/ bit shifts)
+* comparison instructions
+* jump instructions
+* system mode instructions (svc, uret, sret, ...)
+* subsystems instructions (ssr & ssw)
+
diff --git a/src/execution-engine-spec/intro.adoc b/src/execution-engine-spec/intro.adoc
index bba388d..8ccbdb6 100644
--- a/src/execution-engine-spec/intro.adoc
+++ b/src/execution-engine-spec/intro.adoc
@@ -7,14 +7,14 @@ The {central-arch-name} uses byte-addressable memory.
 While an _Execution engine_ handles data 32-bits wide, memory addresses are only 24-bits wide.
 An _Execution Engine_ can thus address up to 16MB of main memory.
 
-NOTE: We use the terms "`memory`" and "`main memory`" interchangably. Main memory refers to the RAM while we use the term "`secondary memory`" to refer to HDD or SSD storage.
+NOTE: We use the terms "`memory`" and "`main memory`" interchangeably. Main memory refers to the RAM while we use the term "`secondary memory`" to refer to HDD or SSD storage.
 
 At the hardware level, memory accesses are done on a memory-word boundary.
 A memory-word is 32-bits wide and memory accesses should be done at a 32-bits alignment to avoid wasting cycles doing double the amount of memory operations.
 
 NOTE: The term "`memory accesses`" encompasses both read and write operations.
 
-Data is encoded in memory with the little endian scheme.
+Data is encoded in memory in little endian.
 For a given value, the least significant byte (LSB) is stored in the lowest address and the most significant byte (MSB) in the highest.
 
 === System Modes and Privilege Levels
@@ -48,7 +48,7 @@ Supervisor-mode::
     Software executing in this mode provides context switching, I/O, process management and inter-process communications.
 
 Fault-mode::
-    Code executes in this mode when a double fault occurs, i.e. when an exception is generated in system-mode code.
+    Code executes in this mode when a double fault occurs, i.e. when an exception is generated in supervisor-mode code.
     Code executing under this mode can be used to log/report double faults and then reset/halt the system.
     Debug exceptions generated in supervisor-mode code are also handled in this mode, in which case control is passed back to supervisor-mode after handling.
 
@@ -62,7 +62,7 @@ Exceptions thus always suspend user code for the duration of their handling.
 Exceptions can be of two types: *synchronous* and *asynchronous*.
 
 ==== Synchronous Exceptions
-Synchronous exceptions are generated from events originating from inside of the _Execution engine_.
+Synchronous exceptions are generated from events originating from inside of the _Execution Engine_.
 They are a conditional or unconditional response to the execution of an instruction.
 
 SVC::
@@ -84,11 +84,18 @@ Debug::
     * Fetching an instruction located at an address matching a configured _Hardware Breakpoint_,
     * Accessing a memory address matching a configured _Hardware Watchpoint_
 
+SvcDebug::
+    This exception is the same as the *Debug* exception, except it is generated when debug events are encountered while in supervisor-mode.
+
+UnknownInstr::
+    This exception is generated when an unknown instruction failed to be executed.
+    It is important not to ignore this exception as it can be the symptom of a memory corruption bug.
+
 ==== Asynchronous Exceptions
 Asynchronous exceptions are generated from events originating from outside of the _Execution engine_.
 These exceptions enable the system to react to its environment.
 
-HardMgmt::
+HdwrMgmt::
     This exception is generated when the _Hardware Management Console_ communicates with the _Processing Unit_ and that the _Processing Unit_ relays the event to the _Execution Engine_.
     Data can be passed alongside the exception and would be stored in main memory by the _Processing Unit_ communications controller.
 
diff --git a/src/execution-engine-spec/registers.adoc b/src/execution-engine-spec/registers.adoc
index c84c2e8..f78c6d0 100644
--- a/src/execution-engine-spec/registers.adoc
+++ b/src/execution-engine-spec/registers.adoc
@@ -1,7 +1,7 @@
 === Registers
 ==== General Purpose Registers
 General purpose registers (GPRs) are used to perform calculations and store intermediate values.
-There are 8 GPRs in an Execution Engine. These registers are named *_r0_* through *_r7_*.
+There are 8 GPRs in an _Execution Engine_. These registers are named *_r0_* through *_r7_*.
 
 ==== Special Purpose Registers