Added psr and esr special registers

src/central-execution-engine-spec.adoc

@@ -8,5 +8,6 @@ This means that the amount of information pertaining to the internals of an _Exe
 
 include::execution-engine-spec/glossary.adoc[]
 include::execution-engine-spec/intro.adoc[]
+include::execution-engine-spec/program-and-exception-status-registers.adoc[]
 include::execution-engine-spec/channel-io-overview.adoc[]
 include::execution-engine-spec/instructions.adoc[]

src/execution-engine-spec/program-and-exception-status-registers.adoc

@@ -0,0 +1,39 @@
+[id=psr-and-esr]
+== Program & Exception Status Registers
+=== Program Status Register
+
+[wavedrom, ,svg]
+....
+{reg: [
+  {bits: 1, name: 'C', type: 2, attr: ['R', 'W']},
+  {bits: 1, name: 'Z', type: 2, attr: ['R', 'W']},
+  {bits: 1, name: 'N', type: 2, attr: ['R', 'W']},
+  {bits: 1, name: 'V', type: 2, attr: ['R', 'W']},
+  {bits: 4, name: 0x0, attr: 'unused'},
+  {bits: 1, name: 'U', type: 6, attr: 'R'},
+  {bits: 1, name: 'S', type: 6, attr: 'R'},
+  {bits: 1, name: 'F', type: 6, attr: 'R'},
+  {bits: 21, name: 0x0, attr: 'unused'},
+], config: {label: {right: 'psr'}}}
+....
+
+Only the ALU flags (C, Z, N, V) can be written to. Writing a 32-bits value into *psr* thus ignores the 28 upper bits.
+
+=== Exception Status Registers
+
+[wavedrom, ,svg]
+....
+{reg: [
+  {bits: 24, name: 'arg', type: 5},
+  {bits: 8, name: 'exc', type: 8},
+], config: {label: {right: 'esr_svc'}}}
+....
+
+[wavedrom, ,svg]
+....
+{reg: [
+  {bits: 24, name: 'arg', type: 5},
+  {bits: 8, name: 'exc', type: 8},
+], config: {label: {right: 'esr_fault'}}}
+....
+

src/execution-engine-spec/registers.adoc

@@ -5,66 +5,90 @@ There are 8 GPRs in an _Execution Engine_. These registers are named *_r0_* thro
 
 ==== Special Purpose Registers
 
-.Special purpose registers
+.Registers accessible via common instructions
 [cols="1,1,1,1,3"]
 |===
 |Name |User-mode |Supervisor-mode |Fault-mode |Description
 
 |lr
-|X
+|R/W
-|X
+|R/W
-|X
+|R/W
 |Link register. Store the return address from a Branch-with-Link.
 
 |pc
-|X
+|R/W
-|X
+|R/W
-|X
+|R/W
 |Program counter alias register. It is used as an alias to the current processor mode program counter register.
 
 |sp
-|X
+|R/W
-|X
+|R/W
-|X
+|R/W
 |Stack pointer alias register. It is used as an alias to the current processor mode stack pointer register.
 
 |pc_user
-|X
+|R/W
-|X
+|R/W
-|X
+|R/W
 |User-mode program counter.
 
 |sp_user
-|X
+|R/W
-|X
+|R/W
-|X
+|R/W
 |User-mode stack pointer.
 
-|pc_sys
+|pc_svc
 |
-|X
+|R/W
-|X
+|R/W
 |Supervisor-mode program counter.
 
-|sp_sys
+|sp_svc
 |
-|X
+|R/W
-|X
+|R/W
 |Supervisor-mode stack pointer.
 
 |pc_fault
 |
-|X
+|R/W
-|X
+|R/W
 |Fault-mode program counter.
 
 |sp_fault
 |
-|X
+|R/W
-|X
+|R/W
 |Fault-mode stack pointer.
 |===
 
-Other notable registers are accessible through <<subsystems-intro,subsystems>>. +
+.Registers accessible via special instructions: `srr` & `srw`
-#TODO: Add the Program Status Register (ALU flags C, Z, N, V and processor modes U, S, F), Exception Status Register and the Channel Status Register in the Execution Engine State Subsystem.#
+[cols="1,1,1,1,3"]
+|===
+|Name |User-mode |Supervisor-mode |Fault-mode |Description
+
+|psr
+|R
+|R/W
+|R/W
+|Program state register. Contains the ALU flags (C, Z, N, V) and the system mode flags (U, S, F). Writes by non privileged software are ignored. More details in <<psr-and-esr>>.
+
+|esr_svc
+|
+|R
+|R
+|Supervisor-mode exception status register. Contains the identifier of the current exception being handled and a value passed along the exception. Read-only, writes are ignored. More details in <<psr-and-esr>>.
+
+|esr_fault
+|
+|R
+|R
+|Fault-mode exception status register. Same as the *esr_svc* register. Read-only, writes are ignored. More details in <<psr-and-esr>>.
+|===
+
+Other notable registers are accessible through <<subsystems-intro,subsystems>>. +
+#TODO: Add the Channel Status Register in the Execution Engine State Subsystem.#