Added info on esr registers and reset behavior
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Elyan 2024-10-31 10:12:53 +01:00
parent ab401b9d1b
commit 5f44805554
5 changed files with 89 additions and 4 deletions

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@ -12,3 +12,4 @@ include::execution-engine-spec/program-and-exception-status-registers.adoc[]
include::execution-engine-spec/channel-io-overview.adoc[] include::execution-engine-spec/channel-io-overview.adoc[]
include::execution-engine-spec/instructions.adoc[] include::execution-engine-spec/instructions.adoc[]
include::execution-engine-spec/subsystems.adoc[] include::execution-engine-spec/subsystems.adoc[]
include::execution-engine-spec/system-behavior.adoc[]

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@ -491,7 +491,7 @@ ssr ss15, pc, sr32, 0 <2>
Privileged instruction:: No. (The access control is done at the register/command level). Privileged instruction:: No. (The access control is done at the register/command level).
Updates program state flags:: No. Updates program state flags:: No.
Exceptions:: UnknownInstr. Exceptions:: PrivFault.
<<< <<<
===== SSW: Subsystem Register Write ===== SSW: Subsystem Register Write
@ -539,5 +539,5 @@ ssw ss15, pc, sr32, 0 <2>
Privileged instruction:: No. (The access control is done at the register/command level). Privileged instruction:: No. (The access control is done at the register/command level).
Updates program state flags:: No. Updates program state flags:: No.
Exceptions:: UnknownInstr. Exceptions:: PrivFault.

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@ -88,6 +88,9 @@ Debug::
SvcDebug:: SvcDebug::
This exception is the same as the *Debug* exception, except it is generated when debug events are encountered while in supervisor-mode. This exception is the same as the *Debug* exception, except it is generated when debug events are encountered while in supervisor-mode.
PrivFault::
This exception is generated when unprivileged software tries to execute a privileged instruction or tries to acces a privileged susbsystem register.
UnknownInstr:: UnknownInstr::
This exception is generated when an unknown instruction failed to be executed. This exception is generated when an unknown instruction failed to be executed.
It is important not to ignore this exception as it can be the symptom of a memory corruption bug. It is important not to ignore this exception as it can be the symptom of a memory corruption bug.

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@ -17,7 +17,7 @@
], config: {label: {right: 'psr'}}} ], config: {label: {right: 'psr'}}}
.... ....
Only the ALU flags (C, Z, N, V) can be written to. Writing a 32-bits value into *psr* thus ignores the 28 upper bits. Only the ALU flags (C, Z, N, V) can be written to. Writing a 32-bits value into *psr* thus ignores the 28 upper bits in any system mode.
=== Exception Status Registers === Exception Status Registers
@ -37,3 +37,49 @@ Only the ALU flags (C, Z, N, V) can be written to. Writing a 32-bits value into
], config: {label: {right: 'esr_fault'}}} ], config: {label: {right: 'esr_fault'}}}
.... ....
.Exceptions
[%header,cols="1,1,3"]
|===
|Value |Name |Argument
|0
|_Reset_
|_N/A_
|1
|SVC
|The SVC number.
|2
|MemFault
|The virtual address being accessed.
|3
|SysTick
|_N/A_
|4
|Debug
|#TODO: Describe it.#
|5
|SvcDebug
|#TODO: Describe it.#
|6
|PrivFault
|#TODO Describe it.#
|7
|UnknownInstr
|The virtual address of the instruction.
|8
|HdwrMgmt
|#TODO Describe it.#
|9
|Channel
|The channel number and exception reason. #TODO: Describe it.#
|===

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@ -0,0 +1,35 @@
== System Behavior
=== On Reset
On reset, the _Execution Engine_ assumes that the bootloader software was loaded in memory at address 0x0000_0000. +
The _Execution Engine_ starts execution in Supervisor mode.
.Registers content on reset
[cols="1,2,3"]
|===
|Register |Value |Description
|r0
|_Execution Engine_ ID
|Contains the execution engine ID. Reserved for when multiple _Execution Engines_ in a _Processing Unit_ will be specified. Always 0 until then.
|r1..r7, lr, sp_user, sp_svc, sp_fault
|_Unspecified_
|N/A
|pc_user, pc_fault
|0x0000_0004
|#TODO: Describe it#
|pc_svc
|0x0000_0000
|#TODO: Describe it#
|psr
|_See description_
|U=0, S=1, F=0. C, Z, N and V are undefined.
|esr_svc, esr_fault
|0x0000_0000
|exc=_Reset_
|===