Added info on the data handled by the CPU

src/central-execution-engine-spec.adoc

@@ -1,8 +1,11 @@
 = Central(Execution Engine): Public Interface Specification
-:reproducible:
-:doctype: book
-:lang: en
-:toc: left
-:toclevels: 5
+include::global-config.adoc[]
+include::custom-attributes.adoc[]
+:preface-title: Preface
 
-include::glossary.adoc[]
+This document presents the public interface of an _Execution Engine_ of the {central-arch-name}.
+This means that the amount of information pertaining to the internals of an _Execution Engine_ hardware implementation are kept at a minimum except when a choice in the public interface is specifically made to simplify said implementation.
+
+include::execution-engine-spec/glossary.adoc[]
+
+include::execution-engine-spec/data-manipulation.adoc[]

src/custom-attributes.adoc

@@ -0,0 +1 @@
+:central-arch-name: pass:quotes[**Central(**Architecture**)**]

src/execution-engine-spec/data-manipulation.adoc

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+== Data Manipulation
+=== Data width
+All the registers of the {central-arch-name} are 32bit wide.
+
+=== Address width
+Memory addresses are 24bit wide thus an _Execution Engine_ can address up to 16MB of memory.
+
+=== Memory alignment
+The {central-arch-name} uses byte-addressable memory. Under the hood, memory accesses are done on a memory-word boundary.
+A memory-word is 32bit wide. To maximize performance, memory accesses should be done on a 32bit alignment.
+
+NOTE: The term "`memory accesses`" encompasses both read and write operations.
+
+=== Endianness
+Data is encoded in memory with the little endian scheme. For a given value, the least significant byte (LSB) is stored in the lowest address and the most significant byte (MSB) in the highest.

src/execution-engine-spec/glossary.adoc

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+[glossary]
+== Glossary
+
+[glossary]
+Central Processing Unit:: An hardware unit containing one or more _Execution Engines_, a memory controller, an interrupt controller, an operator facility controller and various other minor components.
+Execution Engine:: The hardware responsible for the execution of user-written code, be it kernel code or user program code. An _Execution Engine_ contains a fetch unit, a decode unit, a micro-instruction sequencer, an Arithmetic & Logic Unit, various registers and subsystems. An _Execution Engine_ is analogous to an _hart_ in the RISC-V nomenclature or to a _core_ in other CPU specifications.

src/global-config.adoc

@@ -0,0 +1,6 @@
+:reproducible:
+:doctype: book
+:icons: font
+:lang: en
+:toc: left
+:toclevels: 5

src/glossary.adoc

@@ -1,7 +0,0 @@
-[glossary]
-== Glossary
-
-[glossary]
-Central Processing Unit:: An hardware unit containing one or more *Execution Engines*, a memory controller, an interrupt controller, an operator facility controller and various other minor components.
-
-Execution Engine:: The hardware responsible for the execution of user-written code, be it kernel code or user program code. An *Execution Engine* contains a fetch unit, a decode unit, a micro-instruction sequencer, an Arithmetic & Logic Unit, various registers and subsystems. An *Execution Engine* is analogous to an *hart* in the RISC-V nomenclature or to a *core* in other CPU specifications.