From 08b91659020ad5f0593c77dc495a95f30519a50f Mon Sep 17 00:00:00 2001
From: Elyan <elyanpoujol@gmail.com>
Date: Mon, 11 Nov 2024 15:30:03 +0100
Subject: [PATCH] Added an index to the instruction variants for each
 instruction

---
 src/execution-engine-spec/instructions.adoc   | 64 +++++++++++++++++++
 src/execution-engine-spec/instructions/b.adoc |  1 +
 .../instructions/bl.adoc                      |  1 +
 .../instructions/blx.adoc                     |  1 +
 .../instructions/bx.adoc                      |  1 +
 .../instructions/ldr.adoc                     |  1 +
 .../instructions/ldrc.adoc                    |  1 +
 .../instructions/ldrh.adoc                    |  1 +
 .../instructions/mov.adoc                     |  3 +-
 .../instructions/movn.adoc                    |  2 +-
 .../instructions/nop.adoc                     |  2 +-
 .../instructions/ssr.adoc                     |  2 +-
 .../instructions/ssw.adoc                     |  2 +-
 .../instructions/svc.adoc                     |  2 +-
 14 files changed, 78 insertions(+), 6 deletions(-)

diff --git a/src/execution-engine-spec/instructions.adoc b/src/execution-engine-spec/instructions.adoc
index f50958f..06827c1 100644
--- a/src/execution-engine-spec/instructions.adoc
+++ b/src/execution-engine-spec/instructions.adoc
@@ -23,12 +23,37 @@ include::instructions-operands-encoding.adoc[]
 * system mode instructions (svc, uret, sret, ...)
 
 ==== Miscellaneous Instructions
+[frame=ends,grid=rows,cols="1,1"]
+|===
+|Instruction | Description
+
+|NOP
+|<<NOPINSTR>>
+
+|SVC
+|<<SVCINSTR>>
+|===
+<<<
 include::instructions/nop.adoc[]
 <<<
 include::instructions/svc.adoc[]
 
 <<<
 ==== Memory-Related Instructions
+[frame=ends,grid=rows,cols="1,1"]
+|===
+|Instruction | Description
+
+|LDR
+|<<LDRINSTR>>
+
+|LDRH
+|<<LDRHINSTR>>
+
+|LDRC
+|<<LDRCINSTR>>
+|===
+<<<
 include::instructions/ldr.adoc[]
 <<<
 include::instructions/ldrh.adoc[]
@@ -37,12 +62,40 @@ include::instructions/ldrc.adoc[]
 
 <<<
 ==== Register Manipulation Instructions
+[frame=ends,grid=rows,cols="1,1"]
+|===
+|Instruction | Description
+
+|MOV
+|<<MOVINSTR>>
+
+|MOVN
+|<<MOVNINSTR>>
+|===
+<<<
 include::instructions/mov.adoc[]
 <<<
 include::instructions/movn.adoc[]
 
 <<<
 ==== Branching Instructions
+[frame=ends,grid=rows,cols="1,1"]
+|===
+|Instruction | Description
+
+|B
+|<<BINSTR>>
+
+|BX
+|<<BXINSTR>>
+
+|BL
+|<<BLINSTR>>
+
+|BLX
+|<<BLXINSTR>>
+|===
+<<<
 include::instructions/b.adoc[]
 <<<
 include::instructions/bx.adoc[]
@@ -53,6 +106,17 @@ include::instructions/blx.adoc[]
 
 <<<
 ==== Subsystems Instructions
+[frame=ends,grid=rows,cols="1,1"]
+|===
+|Instruction | Description
+
+|SSR
+|<<SSRINSTR>>
+
+|SSW
+|<<SSWINSTR>>
+|===
+<<<
 include::instructions/ssr.adoc[]
 <<<
 include::instructions/ssw.adoc[]
diff --git a/src/execution-engine-spec/instructions/b.adoc b/src/execution-engine-spec/instructions/b.adoc
index d8ca91e..48f8eaa 100644
--- a/src/execution-engine-spec/instructions/b.adoc
+++ b/src/execution-engine-spec/instructions/b.adoc
@@ -1,3 +1,4 @@
+[id=BINSTR]
 ===== B: Branch
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/bl.adoc b/src/execution-engine-spec/instructions/bl.adoc
index 839249b..3648eee 100644
--- a/src/execution-engine-spec/instructions/bl.adoc
+++ b/src/execution-engine-spec/instructions/bl.adoc
@@ -1,3 +1,4 @@
+[id=BLINSTR]
 ===== BL: Branch with Link
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/blx.adoc b/src/execution-engine-spec/instructions/blx.adoc
index cc5a4da..13d2906 100644
--- a/src/execution-engine-spec/instructions/blx.adoc
+++ b/src/execution-engine-spec/instructions/blx.adoc
@@ -1,3 +1,4 @@
+[id=BLXINSTR]
 ===== BLX: Branch with Link Extended
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/bx.adoc b/src/execution-engine-spec/instructions/bx.adoc
index ecbac02..c87e25a 100644
--- a/src/execution-engine-spec/instructions/bx.adoc
+++ b/src/execution-engine-spec/instructions/bx.adoc
@@ -1,3 +1,4 @@
+[id=BXINSTR]
 ===== BX: Branch Extended
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/ldr.adoc b/src/execution-engine-spec/instructions/ldr.adoc
index 88b3ae1..bb83285 100644
--- a/src/execution-engine-spec/instructions/ldr.adoc
+++ b/src/execution-engine-spec/instructions/ldr.adoc
@@ -1,3 +1,4 @@
+[id=LDRINSTR]
 ===== LDR: Load Register
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/ldrc.adoc b/src/execution-engine-spec/instructions/ldrc.adoc
index 2bbfb42..7a9eab0 100644
--- a/src/execution-engine-spec/instructions/ldrc.adoc
+++ b/src/execution-engine-spec/instructions/ldrc.adoc
@@ -1,3 +1,4 @@
+[id=LDRCINSTR]
 ===== LDRC: Load Register Character
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/ldrh.adoc b/src/execution-engine-spec/instructions/ldrh.adoc
index 9934495..2ce1cd5 100644
--- a/src/execution-engine-spec/instructions/ldrh.adoc
+++ b/src/execution-engine-spec/instructions/ldrh.adoc
@@ -1,3 +1,4 @@
+[id=LDRHINSTR]
 ===== LDRH: Load Register Halfword
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/mov.adoc b/src/execution-engine-spec/instructions/mov.adoc
index 5200637..55b693a 100644
--- a/src/execution-engine-spec/instructions/mov.adoc
+++ b/src/execution-engine-spec/instructions/mov.adoc
@@ -1,3 +1,4 @@
+[id=MOVINSTR]
 ===== MOV: Move to Register
 [wavedrom, ,svg]
 ....
@@ -67,7 +68,7 @@ Exceptions::
 ====== MOVI: Move Immediate to Register
 Description::
     Sets a destination register to the value given in the immediate field. +
-    To set a negative value, use <<MOVNI>>.
+    To set a negative value, use <<MOVNINSTR>>.
 Encoding:: C-Type
 Assembler syntax::
 +
diff --git a/src/execution-engine-spec/instructions/movn.adoc b/src/execution-engine-spec/instructions/movn.adoc
index 54d5dd0..bdb32fb 100644
--- a/src/execution-engine-spec/instructions/movn.adoc
+++ b/src/execution-engine-spec/instructions/movn.adoc
@@ -1,4 +1,4 @@
-[id=MOVNI]
+[id=MOVNINSTR]
 ===== MOVN: Move Negative Immediate to Register
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/nop.adoc b/src/execution-engine-spec/instructions/nop.adoc
index b42caa3..27bfcf9 100644
--- a/src/execution-engine-spec/instructions/nop.adoc
+++ b/src/execution-engine-spec/instructions/nop.adoc
@@ -1,4 +1,4 @@
-[id=NOP]
+[id=NOPINSTR]
 ===== NOP: No Operation
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/ssr.adoc b/src/execution-engine-spec/instructions/ssr.adoc
index 79810e7..2e08973 100644
--- a/src/execution-engine-spec/instructions/ssr.adoc
+++ b/src/execution-engine-spec/instructions/ssr.adoc
@@ -1,4 +1,4 @@
-[id=SSR]
+[id=SSRINSTR]
 ===== SSR: Subsystem Register Read
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/ssw.adoc b/src/execution-engine-spec/instructions/ssw.adoc
index 578bdeb..2aeff25 100644
--- a/src/execution-engine-spec/instructions/ssw.adoc
+++ b/src/execution-engine-spec/instructions/ssw.adoc
@@ -1,4 +1,4 @@
-[id=SSW]
+[id=SSWINSTR]
 ===== SSW: Subsystem Register Write
 [wavedrom, ,svg]
 ....
diff --git a/src/execution-engine-spec/instructions/svc.adoc b/src/execution-engine-spec/instructions/svc.adoc
index a754a39..cc9d45a 100644
--- a/src/execution-engine-spec/instructions/svc.adoc
+++ b/src/execution-engine-spec/instructions/svc.adoc
@@ -1,4 +1,4 @@
-[id=SVC]
+[id=SVCINSTR]
 ===== SVC: Supervisor Call
 [wavedrom, ,svg]
 ....